Design of Low Power CMOS Latched Comparator for Portable Medical Applications

Author Name(s): C. Ashok Kumar, Dr. B. K. Madhavi, Dr. K. Lal Kishore
Author Email: cheelikumar@gmail.com

Abstract

In this work a new architectural design of latched comparator that is suitable for implementation in portable health Monitoring applications has been proposed. In the new proposed design of the latched comparator, lower power dissipation is achieved due to the low transistor count of the circuit. Moreover the proposed comparator consists of the positive feedback mechanism to overcome the non idealities of comparator like kickback noise and offset voltage. In this paper, proposed circuit is carried out using Tanner EDA tools in CMOS technology. In this brief, work proposed is designed well to operate with the frequencies between 50 to 250 KHz and with supply voltages from 450mV to 1V.The non-idealities of the proposed comparator are considerably and power dissipation is also reduced.

 Keywords

Cardiac Monitoring Applications, Low Transistor Count, Kickback Noise, Comparator

 Introduction

Latched Comparators are one of the crucial components in the design of analog to digital converters (ADCs) which are very necessary in most of the applications related to signal processing. One important application is Cardiac Implantable Medical Device for monitoring cardiac Signals. Such applications are implemented in CMOS nanometer technology with a lot of digital signal processing circuits as well as analog circuits. The overall performance of the device depends on the analog to digital converter circuits. Hence, there is a need to improve comparators. These are usually energy constrained and they are battery operated. Therefore it is very essential to design the low power circuits for increasing battery life of the device [1],[2].

Conclusion

In this brief, various architectures of latched comparators for portable medical applications have been extensively studied and also designed a new architecture of latched comparator which is able to overcome the non–idealities of the comparator. The newly designed circuit is able achieve good considerable results and it is shown in simulation results using Tanner EDA tools. The results during the simulation of the proposed circuit shows that, the designed circuit yields low kickback noise low offset and also consumes low power when compared with other architectures used in portable medical Applications.

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