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System on chip (SoC) is generally referred to as the integration of software and silicon hardware which are designed to perform certain functions for various applications like smart phones, digital television etc. Network-On-Chip (NoC) can be seen as the novel communication mechanism that can be adopted for utilization with SoC. Router plays a very important role for NoC. The foremost dispute in these NoC routers is related to the quality of service (QoS) functionalities like better bandwidth, inadequate transaction times, rate of losses, and low congestion. Throughput, Latency or Delay, Errors, Bandwidth, Dropped Packets, Jitter or variation in delay, Packet loss, Out-of-order packet delivery are certain parameters that are to be considered while designing the NoC for better QoS. To improve Quality of Service (QoS) parameters such as throughput and latency, Virtual Output Queuing (VOQ) signaling technique based router architecture is proposed. The number of pipeline stages of a packet transfer is reduced to less number of stages with switch allocation and traversal based on VOQ application in buffering. The study is undertaken to improve the Quality of Service in NoC architecture by proposing a novel modeling technique.
Keywords Dynamic XY (DyXY) Routing Algorithm, Modified Cuckoo Search Optimization, Network-on-Chip (NoC), Quality of Service (QoS), System-on-Chips (SoCs), Virtual Output Queuing (VOQ).
The field of electronics is widely developing in the modern times. The electronics these days have become much more compact accommodating a ton of services in a tiny area. This is facilitated by the integrated architecture. All the different components are developed as a single chip according to the requirement of the application. According to predictions as per the Moore’s Law, the density of an integrated circuit roughly doubles with every passing year . The term System on chip (SOC) is highly popular for compact systems and fundamentally used to refer the chip which has the integration of software with the on-chip silicon hardware and is specially designed so as to perform specific functions. The integrated chip which is system on chip may have digital signals, analog signals, mixed signal or even radio frequency functions – all capable from a single chip developed on a single substrate thereby making it compact as well as functional. They are widely popular in a variety of applications the most common of it being smart phones. They are also found in digital television sets, wearable computing devices and many others .
In this paper, we have presented Virtual Output Queuing (VOQ) signaling approach based router architecture for improving the throughput and latency. The proposed router is implemented for various routing algorithms and topologies using VHDL simulation software and evaluated the performance of throughput and latency. The experimental results show that the proposed Dynamic XY (DyXY) routing algorithm with 4×4 2D network topology reduces the communication latency by 27 in clocks and throughput by 59.4% when compared to other routing algorithm such as XY, Y priority and XYX routing algorithm.
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